The IDE/ATA interface I posted is a simple 8 bit design that buffers the high byte of the 16 bit word the interface uses. It's more what you'd use for a Z80 or 6502 machine than a an 8 bit chip with 16 bit support like the 6803, 68hc11, 6809, etc... Many of the IDE/ATA interfaces I've looked at treat the high byte as a zero and only use half the storage capacity of a device. It works but it won't be readable on a PC.
The control lines from the CPLD to the transceiver are not connected because I want to work out the logic require for a 16 bit interface first. The two bi-directional transceivers required for a 16 bit interface each have 6 control lines, so the control logic will require 12 outputs, multiplexed outputs, or several signals being duplicated between both chips. The CPLD I selected only has 8 configurable I/O lines. I know a few signals are duplicates, but the device may be a bit too small. It's cheap though, so if I can get it to work, someone should be able to built an interface for under $30 using perf board, and that's probably a high estimate.
The control lines from the CPLD to the transceiver are not connected because I want to work out the logic require for a 16 bit interface first. The two bi-directional transceivers required for a 16 bit interface each have 6 control lines, so the control logic will require 12 outputs, multiplexed outputs, or several signals being duplicated between both chips. The CPLD I selected only has 8 configurable I/O lines. I know a few signals are duplicates, but the device may be a bit too small. It's cheap though, so if I can get it to work, someone should be able to built an interface for under $30 using perf board, and that's probably a high estimate.
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